Coarse-Grained Reconfigurable Computing with the Versat Architecture

Reconfigurable computing architectures allow the adaptation of underlying datapath to algorithm. The granularity elements and data width determines architecture its programming flexibility. Coarse-grained have shown right balance between programmability performance. This paper provides an overview coarse-grained reconfigurable describes Versat, a Coarse-Grained Array (CGRA) with self-generated partial reconfiguration, presented as case study for better understanding these architectures. Unlike most existing approaches, which mainly use pre-compiled configurations, Versat program can generate apply myriads on-the-fly configurations. Partial reconfiguration plays central role in this approach, it speeds up generation incrementally different array has complete graph topology, yields unprecedented programmability, including assembly programming. Besides being useful optimising programs, is invaluable working around post-silicon hardware, software, or compiler issues. Results on core area, frequency, power, performance running codes are compared other implementations.